The present invention relates to the field of low voltage digital electronic integrated circuits. More particularly, the present invention relates to a level shifter for converting low voltage digital electronic logic to high voltage output.
Within the communications industry, there is an ever increasing need for lower power consumption and higher switching rates. For example, microprocessor designs are continuously decreasing their die size, and accordingly reducing the power consumption while increasing their performance. Application-specific integrated circuit (ASIC) designs are similarly decreasing their die size, reducing power consumption, and the like. These digital electronic circuits are being used to control many different types of electronic devices. The digital electronic circuits are being used to control functionality of these other devices, thereby imparting sophisticated behavior and complex functions to the devices.
Electronically controlled devices require a means of interfacing with the digital electronic circuits which control them. For example, powerful robotic machine tools require precise electronic interfaces to the digital electronic control modules which control their movement and function. Computer-controlled cathode ray tubes (CRTs) require interfaces to the digital electronics which control the operation of the magnetic components and electron beam components within the tube.
As described above, the digital electronics (e.g., microprocessors, ASICs, etc.) which comprise the controllers for the above types of devices are becoming increasingly integrated and are using lower and lower operating voltages (e.g., 3.3 V or less). However, the devices to which the electronics are interfaced tend to use much higher voltages in their operation. Thus, specialized integrated circuits for converting the low voltage digital electronic logic levels to the high voltage outputs required by external devices have been developed. Such circuits are often referred to as level shifters, since they function by shifting low voltage level logic to corresponding high voltage level output.
Prior art FIG. 1 shows a schematic diagram of a typical prior art level shifter circuit 100. As depicted in FIG. 1, level shifter 100 includes digital logic 110 and 111 for accepting low voltage digital logic inputs (e.g., 5 V), as shown. Transistors 120-123 function by shifting the low voltage digital inputs to the high voltage level of VDD 101. The high voltage outputs are received (e.g., by external circuits) at output 102 and output 103.
During normal operation, level shifter 100 functions by switching transistors 121 and 120 on and off in accordance with the inputs received by the input logic 110 and 111. For example, when transistor 120 is on, transistor 121 is off, output 102 is at VDD and output 103 is at Vref, as determined by transistor 123. Thus, in a case where VDD is 20 volts, level shifter 100 shifts the low voltage (e.g., 5 V) logic inputs from logic 110 and 111 to the 20 volt level of VDD. The higher voltage level can be used to drive external devices, such as power amplifiers, electronic actuators, and the like.
However, there exists a problem when the required output level of output 102 and output 103 exceeds the breakdown voltage of transistors 120 and 121. As described above, transistors 120 and 121 are used to switch the high voltage of VDD onto output 102 and 103 in accordance with the low voltage inputs 110 and 111. Transistors 120 and 121 are typically implemented as large PMOS transistors. Transistors 120 and 121 are off when the voltage applied to their gates is high (e.g., greater than 1.5 V). When VDD is high, for example, 40 V or higher, the voltage across the gates of transistors 120 and 121 exceeds their breakdown voltage. In such a case, transistors 120 and 121 will not be able to stop current flowing from VDD to outputs 102 and 103, and the circuit 100 will not function (and could be destroyed). A typical semiconductor fabrication process, the breakdown voltage is typically 30 V. Thus, conventional semiconductor fabrication technology cannot be used to implement level shifters when the output voltage level exceeds the breakdown voltage of the switching transistors.
Prior art attempts to solve this problem typically involve xe2x80x9ccascadingxe2x80x9d together a number of level shifter circuit stages in order to incrementally build up the output level to that required by the external circuits (e.g., 40 V or higher). Other prior art attempts involved to use of current limiters In attempt to limit the Vgs seen by the main switching transistors. These prior art solutions were unsatisfactory due to the fact that they greatly increased the number of components required, and thus the size of the level shifter circuit. Additionally, these prior art solutions tended to require a constant current path to ground, wherein even during periods of inactivity, with no switching, power is dissipated by the circuit. This constant power dissipation made such circuits inappropriate for heat sensitive or battery-powered devices.
Thus, what is required is a solution capable of providing high voltage level outputs to drive external circuits or external devices. What is required is a compact, low component count circuit which can shift low voltage digital logic inputs to high voltage outputs. The required circuit should not require a constant current path to ground and should not dissipate current during periods of inactivity. The required solution should be compatible with widely used CMOS fabrication processes. The present invention provides a novel solution to these requirements.
The present invention provides a solution capable of providing high voltage level outputs to drive external circuits or external devices. The embodiments of the present invention are directed towards a compact, low component count circuit which can shift low voltage digital logic inputs to high voltage outputs. The circuit of the present invention does not require a constant current path to ground and does not dissipate current during periods of inactivity. Additionally, the circuit of the present invention is compatible with widely used CMOS fabrication processes.
In one embodiment, the present invention is implemented as a level shifter circuit for accepting low voltage inputs and providing high voltage outputs corresponding thereto. The level shifter circuit uses a reference voltage source configured to produce an intermediate voltage with respect to ground and a high voltage source. A first output transistor and a second output transistor are used for producing a high voltage swing output signal by using a high voltage source. Source follower transistors are used to switch on and switch off the first and second output transistors by using the intermediate voltage. The source follower transistors are configured to ensure the maximum voltage seen across the gates of the first and second output transistors is limited to a difference between the intermediate voltage and the high voltage source.
A differential input buffer can be used for controlling the source follower transistors in accordance with a low voltage differential input. The differential input buffer is configured to control the source follower transistors without requiring a static current. The differential input buffer can be configured to accept 5 volt logic differential input or lower. The difference between the intermediate voltage and the high voltage source, comprising the maximum voltage seen across the gates of the output transistors, is 30 volts or less. The high voltage source can be 50 volts or more and the high voltage swing output signal can have an output swing of 50 volts or more. The source follower transistors are PMOS source follower transistors. All the components of the level shifter circuit are compatible with widely used CMOS fabrication processes.
In this manner, the level shifter circuit of the present invention provides high voltage level outputs (e.g., 50 volts or greater) to drive external circuits or external devices (e.g., cathode ray tubes, plasma display panels, and the like). The level shifter circuit is compact, having low component count, and does not dissipate current during periods of inactivity.